CY2PP326 buffer equivalent, 2 x 2 clock and data switch buffer.
* Six ECL/PECL differential outputs
* Two ECL/PECL differential inputs
* Hot-swappable/-insertable
* 50 ps output-to-output skew
* 250 ps device-to-de.
The device is implemented on SiGe technology and has a fully differential internal architecture that is optimized to ac.
The CY2PP326 is a low-skew, low propagation delay 2 x 2 differential clock, data switch, and fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The device is implemented on SiGe technology an.
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